The invention relates to a CMOS band gap circuit and a buffer amplifier circuit providing a low noise, stable reference voltage that is free of power supply noise and is insensitive to transient signals on the output conductor.
Band gap circuits typically are utilized in integrated circuits to generate stable reference voltages which are independent of absolute temperature. A band gap circuit generates a voltage V.sub.THERMAL which is proportional to temperature and a function of the difference in V.sub.BE voltages of two transistors operating at different current densities. The voltage V.sub.THERMAL is "gained up" by a resistive multiplier circuit to a voltage having a temperature coefficient of +2 millivolts per degree Centigrade, and that voltage is summed with a V.sub.BE voltage of an NPN transistor, which has a temperature coefficient of -2 millivolts per degree Centigrade. The summing thereby produces a band gap voltage which is independent of temperature. Band gap circuits are used widely in bipolar integrated circuits. There also is a need for stable voltage reference circuits in CMOS integrated circuits. Some band gap circuits have been implemented in CMOS integrated circuits containing NPN transistors.
CMOS circuits are known to be quite susceptible to high frequency incremental power supply voltage variations, i.e., to power supply noise. One circuit technique for avoiding the effects of power supply noise is the use of "cascode" connected field effect transistors (FETs) connected in series between the power supply voltage bus and the drain of a FET which is to be isolated from the effects of the power supply noise. The gate of the cascode transistor is connected to a suitable reference voltage that does not vary as much as the power supply voltage. It is especially important to be able to essentially eliminate the effects of power supply noise on internal reference voltages that are generated in the CMOS circuit.
A basic requirement of any internal reference voltage source in a CMOS integrated circuit in which "transient loads" are switched to the reference voltage source is that it have a low output impedence so that the generated reference voltage is relatively "immune" to noise that may be coupled onto the reference voltage source.
There is a presently unmet need for a stable, low noise, low output impedance reference voltage circuit that can be implemented in CMOS technology.